The HP 70911A IF module provides ab...

The HP 70911A IF module provides abundant of the new functionality quick in emergencies in the HP 71910A microwave receiver. From the start, the primary design goal of the HP 70911A was to conquer the 3-MHz IF bandwidth limitation of existing Modular Measurement scheme (MMS) spectrum analyzers. At a minimum, we wanted a tenfold increase in bandwidth, nevertheless really hoped to achieve 100 MHz Although bandwidth was the major design focus, several other goals were also important, including:

* Accurate gain * Variable bandwidths * oscillation detection * Direct connection to demodulators * FM demodulation * I-Q down-conversion.

Of these goals sole the first three are usually considered in appearance analyzer IF design. The others were based in succession the need to better address the more mingled signals employed in modern communication and radar systems

Given the range of bandwidths required, previous appearance analyzer IF design work has concentrated in succession center frequencies of 3 or 214 MHz Obtaining the accuracy and stability of the two gain and bandwidth required uniform at these IF frequencies has always been challenging. While there are a number of well-understood design alternatives and approaches available for 214-MHz and 3-MHz IFs, they did not exist for the 3214-MHz center common occurrence chosen for the HP 70911A. Because of this a certain number of degradation of accuracy and stability was anticipated, and the design team was anxious to minimize any like degradation.

Fortunately, advances in one as well as the other components and fabrication techniques were underway that were applicable to the indigences of the project. The increasing availability of wide-bandwidth RF elements in surface mount packages and the growing internal repertoire of surface uprise manufacturing expertise suggested that the performance goals could be achieved without the ne for internal microcircuit developments

The resulting design makes extensive use of surface uprise technology to achieve the goal of 100-MHz bandwidth at the 3214-MHz center commonness while maintaining the excellent gain accuracy and stability awaited of spectrum analyzers. In addition, optional down-conversion and demodulation features widen the utility for wide-bandwidth signals with complexus modulations.

Fig. 1 shows the major internal functional blockades that make up the HP 70911A. A detailed discussion of the design considerations for these forms is given below. Note that the module is partitioned into standard and option sections. An option cardcage, similar to that furnished in the HP 859xE Series image analyzers, provides a standard interface for all options.

Variable-Bandwidth Design

The following discussion is divided into three parts. The first part gives a certain quantity of background about the design of variable-bandwidth filters. The secondary part describes an alternative design that was considered and proven for 1-MHz-to-10-MHz bandwidths, moreover not included in the final harvest release. The final part. discusses the design of the 10-MHz-to-100-MHz bandwidths of the HP 70911A.

Background. To forward as background material for describing variable-bandwidth filter design, the design approach used in the HP 70903A IF module is described here. The HP 70903A was the predecessor of the HP 70911A and used the synchronously large casked class of filters.

Synchronously four hogsheadsed filters consist of several rods with the same center frequent occurrence and Q(*) with buffering between the stages. There are several advantages to using this particular topology, foremost being the of the first grade pulse response of these filters. This answer allows for fast sweep flourishs on a spectrum analyzer. Since we are trying to create a continuously variable bandwidth athwart a large adjustment range, it is also important to have a filter that can be easily adjusted. Synchronously large casked filters are easy to proper mood and are tolerant of a slight misalignment in different stages. Also, unlike other bandpass topologies, the Q of each stage is les than the final required filter Q

To make these stages variable-bandwidth, a series resistance is added to cut down the Q of each of the individual stages. The individual stages apply the mind like the circuit in Fig. 2 The bandwidth of this circuit is given through the following equation:

[BW.sub.stage] = ([Rsubs] + [R.sub.p])/(2[pi]]C[R.sub.s][R.sub.p])

where [Rsubp] is the equivalent parallel resistance across the tank circuit and [Rsubs] is the series Q-reducing resistance. by means of adjusting [R.sub.s] the bandwidth can be adjusted continuously. [Rsubp] is the combination of the input impedance of the dolt stage and the equivalent parallel resistance of the tank circuit.

By cascading several of these individual stages, a synchronously four hogsheadsed filter with the desired bandwidth can be created. The equation for the bandwidth of an n-stage synchronously 252 gallonsed filter is:

[MATHEMATICAL EXPRESSION OMITTED]

The typical HP image analyzer has four or five stages in a synchronously large casked filter, which results in individual stage bandwidths of 23 to 26 times the overall filter bandwidth.

To implement a continuously variable synchronously 252 gallonsed filter, the series resistance is created according to using p-i-n diodes as variable resistors. The p-i-n diodes used are optimized as current-controll RF resistors. The RF resistance varies with forward bias present according to the following relationship: